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나노 구조 물리 연구단
나노구조물리 연구단
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Impact of Heat Treatment on a Hetero-Stacked MoS2/h-BN Field-Effect Transistor

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Title
Impact of Heat Treatment on a Hetero-Stacked MoS2/h-BN Field-Effect Transistor
Author(s)
Hyunjin Ji; Hojoon Yi; Huong Thi Thanh Nguyen; Sakong Wonkil; Min-Kyu Joo; Hyun Kim; Seong Chu Lim
Publication Date
2019-10
Journal
IEEE ELECTRON DEVICE LETTERS, v.40, no.10, pp.1626 - 1629
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Abstract
We investigated device properties before and after heat treatment for a hetero-stacked two-dimensional field-effect transistor (FET). In dual-gated monolayer MoS2 FET using a top h-BN layer and bottom SiO2 substrate, careful but harsh heat treatment is implemented in high vacuum at 200 similar to C for 18 h. Under the top-gate bias sweep, the field-effect mobility increases by similar to 9 times, and the channel carrier density doubles after the treatment. The heat treatment effect is more noticeable in the top-transferred h-BN than in the bottom SiO2 layer, because it leads to homogeneous adhesion between the layers by diminishing the adverse effects of interfacial bubbles or adsorbates. A top-gate dielectric capacitance for h-BN of 55 fF is increased to similar to 70 fF after the treatment, which is comparable to the theoretical value. This indicates that strong capacitive coupling for the top gate is formed, as confirmed by the capacitance-voltage measurement. c. 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
URI
https://pr.ibs.re.kr/handle/8788114/6559
ISSN
0741-3106
Appears in Collections:
Center for Integrated Nanostructure Physics(나노구조물리 연구단) > Journal Papers (저널논문)
Files in This Item:
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