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나노 구조 물리 연구단
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Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio

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Title
Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio
Author(s)
Quoc An Vu; Shin Y.S.; Kim Y.R.; Van Luan Nguyen; Kang W.T.; Hyun Kim; Dinh Hoa Luong; Lee I.M.; Lee K.; Ko D.-S.; Heo J.; Park S.; Young Hee Lee; Yu W.J.
Publication Date
2016-09
Journal
NATURE COMMUNICATIONS, v.7, no., pp.12725 -
Publisher
NATURE PUBLISHING GROUP
Abstract
Concepts of non-volatile memory to replace conventional flash memory have suffered from low material reliability and high off-state current, and the use of a thick, rigid blocking oxide layer in flash memory further restricts vertical scale-up. Here, we report a two-terminal floating gate memory, tunnelling random access memory fabricated by a monolayer MoS2/h-BN/monolayer graphene vertical stack. Our device uses a two-terminal electrode for current flow in the MoS2 channel and simultaneously for charging and discharging the graphene floating gate through the h-BN tunnelling barrier. By effective charge tunnelling through crystalline h-BN layer and storing charges in graphene layer, our memory device demonstrates an ultimately low off-state current of 10-14 A, leading to ultrahigh on/off ratio over 109, about ∼103 times higher than other two-terminal memories. Furthermore, the absence of thick, rigid blocking oxides enables high stretchability (>19%) which is useful for soft electronics. © 2016 The Author(s)
URI
http://pr.ibs.re.kr/handle/8788114/2791
DOI
10.1038/ncomms12725
ISSN
2041-1723
Appears in Collections:
Center for Integrated Nanostructure Physics(나노구조물리 연구단) > Journal Papers (저널논문)
Files in This Item:
Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh onoff ratio_Nature COmm_유우종.pdfDownload

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