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Mobility Engineering in Vertical Field Effect Transistors Based on Van der Waals Heterostructures

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Title
Mobility Engineering in Vertical Field Effect Transistors Based on Van der Waals Heterostructures
Author(s)
Yong Seon Shin; Kiyoung Lee; Young Rae Kim; Hyangsook Lee; I. Min Lee; Won Tae Kang; Boo Heung Lee; Kunnyun Kim; Jinseong Heo; Seongjun Park; Young Hee Lee; Woo Jong Yu
Publication Date
2018-03
Journal
ADVANCED MATERIALS, v.30, no.9, pp.1704435 -
Publisher
WILEY-V C H VERLAG GMBH
Abstract
Vertical integration of 2D layered materials to form van der Waals heterostructures (vdWHs) offers new functional electronic and optoelectronic devices. However, the mobility in vertical carrier transport in vdWHs of vertical field-effect transistor (VFET) is not yet investigated in spite of the importance of mobility for the successful application of VFETs in integrated circuits. Here, the mobility in VFET of vdWHs under different drain biases, gate biases, and metal work functions is first investigated and engineered. The traps in WSe2 are the main source of scattering, which influences the vertical mobility and three distinct transport mechanisms: Ohmic transport, trap-limited transport, and space-charge-limited transport. The vertical mobility in VFET can be improved by suppressing the trap states by raising the Fermi level of WSe2. This is achieved by increasing the injected carrier density by applying a high drain voltage, or decreasing the Schottky barrier at the graphene/WSe2 and metal/WSe2 junctions by applying a gate bias and reducing the metal work function, respectively. Consequently, the mobility in Mn vdWH at +50 V gate voltage is about 76 times higher than the initial mobility of Au vdWH. This work enables further improvements in the VFET for successful application in integrated circuits. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim
URI
https://pr.ibs.re.kr/handle/8788114/5928
ISSN
0935-9648
Appears in Collections:
Center for Integrated Nanostructure Physics(나노구조물리 연구단) > Journal Papers (저널논문)
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