CMOS-compatible batch processing of monolayer MoS2 MOSFETs
DC Field | Value | Language |
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dc.contributor.author | Kuanchen Xiong | - |
dc.contributor.author | Hyun Kim | - |
dc.contributor.author | Roderick J Marstell | - |
dc.contributor.author | Alexander Göritz | - |
dc.contributor.author | Christian Wipf | - |
dc.contributor.author | Lei Li | - |
dc.contributor.author | Ji-Hoon Park | - |
dc.contributor.author | Xi Luo | - |
dc.contributor.author | Matthias Wietstruck | - |
dc.contributor.author | Asher Madjar | - |
dc.contributor.author | Nicholas C Strandwitz | - |
dc.contributor.author | Mehmet Kaynak | - |
dc.contributor.author | Young Hee Lee | - |
dc.contributor.author | James C M Hwang | - |
dc.date.available | 2018-07-18T02:04:03Z | - |
dc.date.created | 2018-05-16 | - |
dc.date.issued | 2018-04 | - |
dc.identifier.issn | 0022-3727 | - |
dc.identifier.uri | https://pr.ibs.re.kr/handle/8788114/4574 | - |
dc.description.abstract | Thousands of high-performance 2D metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on wafer-scale chemical vapor deposited MoS2 with fully-CMOS-compatible processes such as photolithography and aluminum metallurgy. The yield was greater than 50% in terms of effective gate control with less-than-10 V threshold voltage, even for MOSFETs having deep-submicron gate length. The large number of fabricated MOSFETs allowed statistics to be gathered and the main yield limiter to be attributed to the weak adhesion between the transferred MoS2 and the substrate. With cut-off frequencies approaching the gigahertz range, the performances of the MOSFETs were comparable to that of state-of-the-art MoS2 MOSFETs, whether the MoS2 was grown by a thin-film process or exfoliated from a bulk crystal © 2018 IOP Publishing Ltd Printed in the UK | - |
dc.language | 영어 | - |
dc.publisher | IOP PUBLISHING LTD | - |
dc.subject | chemical vapor deposition | - |
dc.subject | CMOS process | - |
dc.subject | semiconductor device manufacture | - |
dc.subject | semiconductor nanostructures | - |
dc.subject | thin film transistors | - |
dc.subject | wafer scale integration | - |
dc.subject | MOSFET | - |
dc.title | CMOS-compatible batch processing of monolayer MoS2 MOSFETs | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.identifier.wosid | 000428053100001 | - |
dc.identifier.scopusid | 2-s2.0-85044837485 | - |
dc.identifier.rimsid | 63256 | ko |
dc.date.tcdate | 2018-10-01 | - |
dc.contributor.affiliatedAuthor | Hyun Kim | - |
dc.contributor.affiliatedAuthor | Ji-Hoon Park | - |
dc.contributor.affiliatedAuthor | Young Hee Lee | - |
dc.identifier.doi | 10.1088/1361-6463/aab4ba | - |
dc.identifier.bibliographicCitation | JOURNAL OF PHYSICS D-APPLIED PHYSICS, v.51, no.15, pp.15LT02 | - |
dc.relation.isPartOf | JOURNAL OF PHYSICS D-APPLIED PHYSICS | - |
dc.citation.title | JOURNAL OF PHYSICS D-APPLIED PHYSICS | - |
dc.citation.volume | 51 | - |
dc.citation.number | 15 | - |
dc.citation.startPage | 15LT02 | - |
dc.date.scptcdate | 2018-10-01 | - |
dc.description.wostc | 1 | - |
dc.description.scptc | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | FILMS | - |
dc.subject.keywordAuthor | chemical vapor deposition | - |
dc.subject.keywordAuthor | CMOS process | - |
dc.subject.keywordAuthor | semiconductor device manufacture | - |
dc.subject.keywordAuthor | semiconductor nanostructures | - |
dc.subject.keywordAuthor | thin film transistors | - |
dc.subject.keywordAuthor | wafer scale integration | - |
dc.subject.keywordAuthor | MOSFET | - |