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Influence of the copper substrate roughness on the electrical quality of graphene

DC Field Value Language
dc.contributor.authorGi Duk Kwon-
dc.contributor.authorEric Moyen-
dc.contributor.authorYeo Jin Lee-
dc.contributor.authorYoung Woo Kim-
dc.contributor.authorSeunghyun Baik-
dc.contributor.authorDidier Pribat-
dc.date.available2017-05-19T01:13:34Z-
dc.date.created2017-02-24-
dc.date.issued2017-01-
dc.identifier.issn2053-1591-
dc.identifier.urihttps://pr.ibs.re.kr/handle/8788114/3495-
dc.description.abstractWe present a systematic study of grain size and carrier mobility behaviour in polycrystalline graphene flms grown on copper substrates with various surface roughness values. We first observe that as the surface roughness of the substrate decreases, the graphene grain size increases significantly, thus decreasing the density of grain boundaries. Then, using field-effect transistor structures, we confirm that as the substrate roughness decreases, carrier mobility values in graphene increase, whatever the channel length of the transistor. For a substrate rms roughness around 5 nm (measured on a 10 × 10 μm2 field) and using a fast growth process (∼40 min), we obtain mobility values as high as ∼6900 cm2 Vs-1 for electrons and ∼6000 cm2 Vs-1 for holes in polycrystalline graphene with a small grain size of ∼12-14 μm. © 2017 IOP Pulihing Ltd-
dc.description.uri1-
dc.language영어-
dc.publisherIOP PUBLISHING LTD-
dc.subjectGraphene synthesis-
dc.subjectHigh carrier mobility values-
dc.subjectLow surface roughness-
dc.subjectPolished cu substrate-
dc.titleInfluence of the copper substrate roughness on the electrical quality of graphene-
dc.typeArticle-
dc.type.rimsART-
dc.identifier.wosid000394541100001-
dc.identifier.scopusid2-s2.0-85011710661-
dc.identifier.rimsid58883ko
dc.date.tcdate2018-10-01-
dc.contributor.affiliatedAuthorSeunghyun Baik-
dc.identifier.doi10.1088/2053-1591/aa54d3-
dc.identifier.bibliographicCitationMATERIALS RESEARCH EXPRESS, v.4, no.1, pp.015604 - 015604-
dc.citation.titleMATERIALS RESEARCH EXPRESS-
dc.citation.volume4-
dc.citation.number1-
dc.citation.startPage015604-
dc.citation.endPage015604-
dc.date.scptcdate2018-10-01-
dc.description.wostc3-
dc.description.scptc2-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusGRAIN-BOUNDARIES-
dc.subject.keywordPlusMONOLAYER GRAPHENE-
dc.subject.keywordPlusGROWTH-
dc.subject.keywordPlusFOILS-
dc.subject.keywordPlusTRANSPORT-
dc.subject.keywordPlusMICROSCOPY-
dc.subject.keywordPlusSURFACES-
dc.subject.keywordPlusDEFECTS-
dc.subject.keywordPlusOXYGEN-
dc.subject.keywordPlusFILMS-
dc.subject.keywordAuthorgraphene synthesis-
dc.subject.keywordAuthorpolished Cu substrate-
dc.subject.keywordAuthorlow surface roughness-
dc.subject.keywordAuthorhigh carrier mobility values-
Appears in Collections:
Center for Integrated Nanostructure Physics(나노구조물리 연구단) > 1. Journal Papers (저널논문)
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