Ag/Ni Metallization Bilayer: A Functional Layer for Highly Efficient Polycrystalline SnSe Thermoelectric Modules
DC Field | Value | Language |
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dc.contributor.author | SANG HYUN PARK | - |
dc.contributor.author | YOUNGHWAN JIN | - |
dc.contributor.author | KYUNGHAN AHN | - |
dc.contributor.author | In Chung | - |
dc.contributor.author | CHUNG-YUL YOO | - |
dc.date.available | 2017-05-19T01:13:07Z | - |
dc.date.created | 2017-04-05 | - |
dc.date.issued | 2017-02 | - |
dc.identifier.issn | 0361-5235 | - |
dc.identifier.uri | https://pr.ibs.re.kr/handle/8788114/3477 | - |
dc.description.abstract | The structural and electrical characteristics of Ag/Ni bilayer metallization on polycrystalline thermoelectric SnSe were investigated. Two difficulties with thermoelectric SnSe metallization were identified for Ag and Ni single layers: Sn diffusion into the Ag metallization layer and unexpected cracks in the Ni metallization layer. The proposed Ag/Ni bilayer was prepared by hot-pressing, demonstrating successful metallization on the SnSe surface without interfacial cracks or elemental penetration into the metallization layer. Structural analysis revealed that the Ni layer reacts with SnSe, forming several crystalline phases during metallization that are beneficial for reducing contact resistance. Detailed investigation of the Ni/SnSe interface layer confirms columnar Ni-Sn intermetallic phases [(Ni3Sn and Ni3Sn2) and Ni5.63SnSe2] that suppress Sn diffusion into the Ag layer. Electrical specific-contact resistivity (5.32 9 104 X cm2) of the Ag/Ni bilayer requires further modification for development of high-efficiency polycrystalline SnSe thermoelectric modules. (c) 2016 The Minerals, Metals & Materials Society | - |
dc.description.uri | 1 | - |
dc.language | 영어 | - |
dc.publisher | SPRINGER | - |
dc.subject | Thermoelectric, SnSe, interfaces, contact resistivity | - |
dc.title | Ag/Ni Metallization Bilayer: A Functional Layer for Highly Efficient Polycrystalline SnSe Thermoelectric Modules | - |
dc.type | Article | - |
dc.type.rims | ART | - |
dc.identifier.wosid | 000392291200020 | - |
dc.identifier.scopusid | 2-s2.0-84990871447 | - |
dc.identifier.rimsid | 59125 | ko |
dc.date.tcdate | 2018-10-01 | - |
dc.contributor.affiliatedAuthor | In Chung | - |
dc.identifier.doi | 10.1007/s11664-016-4972-9 | - |
dc.identifier.bibliographicCitation | JOURNAL OF ELECTRONIC MATERIALS, v.46, no.2, pp.848 - 855 | - |
dc.citation.title | JOURNAL OF ELECTRONIC MATERIALS | - |
dc.citation.volume | 46 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 848 | - |
dc.citation.endPage | 855 | - |
dc.date.scptcdate | 2018-10-01 | - |
dc.description.wostc | 4 | - |
dc.description.scptc | 4 | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |