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Passivation effect on gate-bias stress instability of carbon nanotube thin film transistors

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dc.contributor.authorSang Won Lee-
dc.contributor.authorDongseok Suh-
dc.contributor.authorSi Young Lee-
dc.contributor.authorYoung Hee Lee-
dc.date.available2015-04-20T06:02:15Z-
dc.date.created2014-08-11ko
dc.date.issued2014-04-
dc.identifier.issn0003-6951-
dc.identifier.urihttps://pr.ibs.re.kr/handle/8788114/1063-
dc.description.abstractA prior requirement of any developed transistor for practical use is the stability test. Random network carbon nanotube-thin film transistor (CNT-TFT) was fabricated on SiO2/Si. Gate bias stress stability was investigated with various passivation layers of HfO2 and Al 2O3. Compared to the threshold voltage shift without passivation layer, the measured values in the presence of passivation layers were reduced independent of gate bias polarity except HfO2 under positive gate bias stress (PGBS). Al2O3 capping layer was found to be the best passivation layer to prevent ambient gas adsorption, while gas adsorption on HfO2 layer was unavoidable, inducing surface charges to increase threshold voltage shift in particular for PGBS. This high performance in the gate bias stress test of CNT-TFT even superior to that of amorphous silicon opens potential applications to active TFT industry for soft electronics. © 2014 AIP Publishing LLC.-
dc.description.uri1-
dc.language영어-
dc.publisherAMER INST PHYSICS-
dc.subjectCarbon nanotubes-
dc.subjectElectronics industry-
dc.subjectGas adsorption-
dc.subjectHafnium oxides-
dc.subjectThin film transistors-
dc.subjectThreshold voltage-
dc.subjectGate bias polarity-
dc.subjectGate-bias stress-
dc.subjectPassivation effect-
dc.subjectPassivation layer-
dc.subjectPositive gate bias-
dc.subjectSoft electronics-
dc.subjectStability tests-
dc.subjectThreshold voltage shifts-
dc.subjectPassivation-
dc.titlePassivation effect on gate-bias stress instability of carbon nanotube thin film transistors-
dc.typeArticle-
dc.type.rimsART-
dc.identifier.wosid000335145600090-
dc.identifier.scopusid2-s2.0-84900334991-
dc.identifier.rimsid436ko
dc.date.tcdate2018-10-01-
dc.contributor.affiliatedAuthorSang Won Lee-
dc.contributor.affiliatedAuthorDongseok Suh-
dc.contributor.affiliatedAuthorSi Young Lee-
dc.contributor.affiliatedAuthorYoung Hee Lee-
dc.identifier.doi10.1063/1.4873316-
dc.identifier.bibliographicCitationAPPLIED PHYSICS LETTERS, v.104, no.16, pp.163506-
dc.citation.titleAPPLIED PHYSICS LETTERS-
dc.citation.volume104-
dc.citation.number16-
dc.citation.startPage163506-
dc.date.scptcdate2018-10-01-
dc.description.wostc6-
dc.description.scptc8-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusFIELD-EFFECT TRANSISTORS-
dc.subject.keywordPlusATOMIC LAYER DEPOSITION-
dc.subject.keywordPlusLOGIC-CIRCUITS-
dc.subject.keywordPlusTRANSPARENT-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordPlusHYSTERESIS-
dc.subject.keywordPlusDEPENDENCE-
dc.subject.keywordPlusOXIDE-
dc.subject.keywordPlusTIME-
Appears in Collections:
Center for Integrated Nanostructure Physics(나노구조물리 연구단) > 1. Journal Papers (저널논문)
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