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Simulation study of a pixelated silicon sensor on high resistivity integrated with field effect transistor

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Title
Simulation study of a pixelated silicon sensor on high resistivity integrated with field effect transistor
Author(s)
H.Y. Lee; Hyun, HJ; Jeon, HB; Jin-A Jeon; H.S. Lee; M.H. Lee; Lee, MW; Park, H; Song, SJ
Publication Date
2019-04
Journal
NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, v.924, no., pp.14 - 18
Publisher
ELSEVIER SCIENCE BV
Abstract
A position-sensitive pixel array silicon detector with a junction field effect transistor (JFET) switch structure is studied as a device for the direct illumination of X-ray from synchrotron light source. Considering an absorption length of silicon at an X-ray energy and a required thickness of a silicon, a 525 mu m n-type silicon wafer with high resistivity is chosen as the active volume of the detector and is depleted by applying a negative bias voltage to the junction side. The electron-hole pairs produced in an active volume by an X-ray illumination are collected on the electrodes. All pixels with one row are read in parallel and the next row is selected by the control voltage after one row has finished being read. The field shaper is introduced to produce inter-pixel isolation. We perform the simulation of the pixelated silicon position detector with JFET switch and present the characteristics of the transistor such as the drain current as a function of the voltage between the source and drain for different gate voltages. The fabrication processes of the pixel sensor with JFET switch structure based on the simulation result are also described. © 2018 Elsevier B.V. All rights reserved.
URI
https://pr.ibs.re.kr/handle/8788114/6598
ISSN
0168-9002
Appears in Collections:
Center for Underground Physics(지하실험 연구단) > Journal Papers (저널논문)
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