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원자제어저차원전자계연구단
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High-Performance Field-Effect Transistor and Logic Gates Based on GaS-MoS2 van der Waals Heterostructure

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dc.contributor.authorShin, Gwang Hyuk-
dc.contributor.authorLee, Geon-Beom-
dc.contributor.authorEun-Su An-
dc.contributor.authorPark, Cheolmin-
dc.contributor.authorJin, Hyeok Jun-
dc.contributor.authorLee, Khang June-
dc.contributor.authorOh, Dong Sik-
dc.contributor.authorJun Sung Kim-
dc.contributor.authorChoi, Yang-Kyu-
dc.contributor.authorChoi, Sung-Yool-
dc.date.accessioned2020-12-22T07:32:47Z-
dc.date.accessioned2020-12-22T07:32:47Z-
dc.date.available2020-12-22T07:32:47Z-
dc.date.available2020-12-22T07:32:47Z-
dc.date.created2020-02-19-
dc.date.issued2020-01-
dc.identifier.issn1944-8244-
dc.identifier.urihttps://pr.ibs.re.kr/handle/8788114/8739-
dc.description.abstract© 2020 American Chemical Society.This work demonstrates a high-performance and hysteresis-free field-effect transistor based on two-dimensional (2D) semiconductors featuring a van der Waals heterostructure, MoS2 channel, and GaS gate insulator. The transistor exhibits a subthreshold swing of 63 mV/dec, an on/off ratio over 106 within a gate voltage of 0.4 V, and peak mobility of 83 cm2/(V s) at room temperature. The low-frequency noise characteristics were investigated and described by the Hooge mobility fluctuation model. The results suggest that the van der Waals heterostructure of 2D semiconductors can produce a high-performing interface without dangling bonds and defects caused by lattice mismatch. Furthermore, a logic inverter and a NAND gate are demonstrated, with an inverter voltage gain of 14.5, which is higher than previously reported by MoS2-based transistors with oxide dielectrics. Therefore, this transistor based on van der Waals heterostructure exhibits considerable potential in digital logic applications with low-power integrated circuits-
dc.description.uri1-
dc.language영어-
dc.publisherAMER CHEMICAL SOC-
dc.subjectGaS-
dc.subjectheterostructure-
dc.subjectlogic operation-
dc.subjectlow-frequency noise-
dc.subjectMoS2-
dc.subjecttransistor-
dc.titleHigh-Performance Field-Effect Transistor and Logic Gates Based on GaS-MoS2 van der Waals Heterostructure-
dc.typeArticle-
dc.type.rimsART-
dc.identifier.wosid000510532000100-
dc.identifier.scopusid2-s2.0-85078692531-
dc.identifier.rimsid71258-
dc.contributor.affiliatedAuthorEun-Su An-
dc.contributor.affiliatedAuthorJun Sung Kim-
dc.identifier.doi10.1021/acsami.9b20077-
dc.identifier.bibliographicCitationACS APPLIED MATERIALS & INTERFACES, v.12, no.4, pp.5106 - 5112-
dc.citation.titleACS APPLIED MATERIALS & INTERFACES-
dc.citation.volume12-
dc.citation.number4-
dc.citation.startPage5106-
dc.citation.endPage5112-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.subject.keywordPlusLOW-FREQUENCY NOISE-
dc.subject.keywordPlusINTEGRATED-CIRCUITS-
dc.subject.keywordPlusHIGH-MOBILITY-
dc.subject.keywordPlusMOS2-
dc.subject.keywordPlusINTERFACE-
dc.subject.keywordPlusTRANSITION-
dc.subject.keywordPlusELECTRONICS-
dc.subject.keywordPlusDEVICE-
dc.subject.keywordPlusGAS-
dc.subject.keywordAuthorGaS-
dc.subject.keywordAuthorMoS2-
dc.subject.keywordAuthortransistor-
dc.subject.keywordAuthorheterostructure-
dc.subject.keywordAuthorlow-frequency noise-
dc.subject.keywordAuthorlogic operation-
Appears in Collections:
Center for Artificial Low Dimensional Electronic Systems(원자제어 저차원 전자계 연구단) > 1. Journal Papers (저널논문)
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